Memory

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United States of America Patent

PATENT NO 7440307
APP PUB NO 20070121365A1
SERIAL NO

11584491

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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This memory comprises a bit line, a first word line and a second word line arranged to intersect with the bit line while holding the bit line therebetween and a first ferroelectric film and a second ferroelectric film, having capacitances different from each other, arranged between the bit line and the first word line and between the bit line and the second word line respectively at least on a region where the bit line and the first and second word lines intersect with each other. The bit line, the first word line and the first ferroelectric film constitute a first ferroelectric capacitor while the bit line, the second word line and the second ferroelectric film constitute a second ferroelectric capacitor, and the first ferroelectric capacitor and the second ferroelectric capacitor constitute a memory cell.

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Patent Owner(s)

Patent OwnerAddress
PATRENELLA CAPITAL LTD LLC1209 ORANGE STREET WILMINGTON DE 19801

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Matsushita, Shigeharu Katano, JP 28 268
Murayama, Yoshiki Gifu, JP 21 184

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