Semiconductor integrated circuit and nonvolatile memory element
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United States of America Patent
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Sep 23, 2008
Grant Date -
Sep 14, 2006
app pub date -
May 9, 2006
filing date -
Feb 1, 1999
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor integrated circuit device is provided on a semiconductor substrate, and includes a plurality of word lines, a plurality of data lines, and a plurality of electrically programmable and erasable non-volatile memory cells respectively coupled to the plurality of word lines and to the plurality of data lines. The erasable non-volatile memory cell each includes a MIS transistor having a floating gate having a first level polycrystalline silicon layer, a source, and a drain coupled to the corresponding data line, and a control gate formed of a semiconductor region in the semiconductor substrate, the control gate being coupled to the corresponding word line.
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