Fast clock acquisition enable method using phase stir injection to PLL for burst mode optical receivers
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United States of America Patent
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Sep 2, 2008
Grant Date -
N/A
app pub date -
Apr 25, 2003
filing date -
Apr 26, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Systems and methods for aligning the phase of a PLL with an incoming data signal. In one embodiment, when a data signal is received in a PLL, a phase perturbation signal is generated and injected into the PLL. The PLL then performs a phase alignment procedure to lock on to the received data signal. The phase perturbation signal is a damped sinusoidal oscillation that is injected into the PLL when each of a plurality of data packets is received. The perturbation signal has an amplitude sufficient to bump the PLL out of a quasi-stable state around 180 degrees out of phase with the incoming data signal, but is damped to less than a degree of phase shift within 30 ns of being injected.
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