Enhancing data integrity and security in a processor-based system
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United States of America Patent
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Jun 24, 2008
Grant Date -
Jun 24, 2004
app pub date -
Dec 20, 2002
filing date -
Dec 20, 2002
priority date (Note) -
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Abstract
A smart card which includes a non-volatile read/write memory and a processor connected to the memory, and further configured to cause the processor to perform a method for enhancing data security and managing the contents of memory during periods when the computational power of the processor is underutilized. The method includes steps for determining if a command or character has been received, processing and/or responding to the command or character once received, implementing a security measure and/or managing memory, and performing a tamper protocol in response to detecting a security breach, all of which is performed while waiting to receive the next command or character.
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