Communication semiconductor integrated circuit device and a wireless communication system
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United States of America Patent
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Jun 10, 2008
Grant Date -
Mar 31, 2005
app pub date -
Nov 6, 2002
filing date -
Nov 6, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In one embodiment, a PLL circuit is provided with a plurality of pull-in operation modes for pulling a voltage across a filter capacitor (C1, C2) in a lock-up voltage, and with a register (CRG) for designating one of the plurality of pull-in operation modes. The pull-in operation is performed in accordance with a setting value in the register.
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