ASIC having dense mask-programmable portion and related system development method

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7346876
APP PUB NO 20050041149A1
SERIAL NO

10944323

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method is disclosed whereby an inexpensive integrated circuit is provided for use in high volume electronic consumer devices of different makes, wherein each different make must perform a different special function. A common function required in all the different makes is realized in a substantially non-customizable portion. A dense mask-programmable portion is provided for realizing a special function. Interface circuitry is provided that enables an external FPGA to perform the special function at system operating speeds during system development. After system development, the circuitry implemented in the external FPGA is technology-mapped to the mask-programmable portion. A single mask is fashioned such that versions of the integrated circuit are produced with their mask-programmable portions customized to perform the special function. I/O terminals that were used to couple to the external FPGA during system development are usable during normal operation to provide system board access to circuitry within the mask-programmable portion.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
F POSZAT HU L L C2711 CENTERVILLE RD SUITE 400 WILMINGTON DE 19808

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chan, Andrew K Palo Alto, CA 47 1840
Chan, Thomas M Saratoga, CA 4 32
Chiu, Po Weng Campbell, CA 3 21

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation