Semiconductor memory device and manufacturing method for the same
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United States of America Patent
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Jan 1, 2008
Grant Date -
Dec 2, 2004
app pub date -
May 25, 2004
filing date -
May 27, 2003
priority date (Note) -
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Abstract
The present invention provides a semiconductor memory device having one or more protruding semiconductor layers formed on a semiconductor substrate of a first conductivity type and a plurality of memory cells on surfaces of the protruding semiconductor layers, wherein each of the memory cells is formed of a charge storage layer, a control gate and an impurity diffusion layer of a second conductivity type which is formed in a portion of the protruding semiconductor layer and the plurality of memory cells is aligned to at least a predetermined direction, and the control gates of the plurality of memory cells is aligned to the predetermined direction are placed so as to be separated from each other.
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