Nonvolatile memory circuit
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United States of America Patent
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Dec 25, 2007
Grant Date -
May 4, 2006
app pub date -
Sep 30, 2005
filing date -
Sep 30, 2004
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A nonvolatile memory circuit includes a flip-flop to degrade an internal circuit irreversibly based on a voltage applied to a first or second bit line so as to latch data in a nonvolatile manner, a first switch coupled between a first output terminal of the flip-flop and the first bit line, a second switch coupled between the first output terminal of the flip-flop and the first bit line, a third switch coupled between a second output terminal of the flip-flop outputting an inverse of an output of the first output terminal and the second bit line, and a fourth switch coupled between the second output terminal of the flip-flop and the second bit line.
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