Method and apparatus for increasing computer memory performance
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United States of America Patent
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Nov 27, 2007
Grant Date -
Dec 1, 2005
app pub date -
Sep 29, 2004
filing date -
May 25, 2004
priority date (Note) -
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Abstract
A method and apparatus for providing power to a memory array of a computer's memory subsystem, and more particularly power at a level greater than that available through the computer motherboard so as to boost memory performance and operational stability. The apparatus includes a supply device for supplying an input voltage to the memory subsystem at a level that is higher than the power level provided to the memory subsystem by the motherboard. The method entails electrically connecting the supply device to the memory subsystem, and then electrically connecting a power source to the device to deliver the input voltage to the memory subsystem. The additional input voltage supplied to the memory subsystem causes memory chips on memory modules of the memory subsystem to run at higher frequencies, such that the various internal operations of the memory, such as reading and writing, occur more quickly.
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