Method and circuit for processing data in communication networks
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United States of America Patent
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Nov 6, 2007
Grant Date -
Aug 7, 2003
app pub date -
Feb 4, 2002
filing date -
Feb 4, 2002
priority date (Note) -
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Abstract
A method and circuitry for detecting a pattern in received data such as the A1A2 boundary in a SONET frame after deserialization. Two consecutive pluralities of bytes of incoming data are stored and compared with the A1 and A2 values (or bit shifted versions of the A1 and A2 values) until the boundary is detected. The data are then bit shifted so that every byte on the bus is either A2 or A1. A new aligned data bus is then formed such that the last A1 bit occurs on the data bus for a given clock cycle and the first A2 bit occurs on the data bus during the next clock cycle.
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