Method and apparatus for testing a device in an electronic component
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United States of America Patent
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Oct 16, 2007
Grant Date -
May 13, 2004
app pub date -
Apr 24, 2003
filing date -
Nov 10, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus is disclosed for testing a reconfigurable logic block. Preferably, this invention is intended to be used with Field Programmable Gate Array. According to the invention, a test bus addressing unit and a test bus activation unit are used to perform a test on a logic block. Upon selection of a corresponding logic block, a test data is outputted on a test bus which enables a testing of the logic function.
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