Method of manufacturing a cavity package
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United States of America Patent
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Sep 25, 2007
Grant Date -
Jul 6, 2006
app pub date -
May 4, 2005
filing date -
Dec 31, 2004
priority date (Note) -
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status (Latency Note)
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Abstract
A method of making a package for an integrated circuit die. In one embodiment the method comprises providing a semiconductor wafer having a plurality of integrated circuit die formed thereon, each integrated circuit die having a first surface and a second surface opposite the first surface and a plurality of bonding pads formed on the first surface, prior to dicing the semiconductor wafer, selectively applying a curable material over a portion of the first surface of an integrated circuit die formed on the wafer without covering the plurality of bonding pads, curing the curable material and dicing the semiconductor wafer to separate the integrated circuit die from other integrated circuit die formed upon the wafer.
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