Memory integrity self checking in VT/TU cross-connect
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jul 17, 2007
Grant Date -
Mar 31, 2005
app pub date -
Sep 30, 2003
filing date -
Sep 30, 2003
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method and apparatus for detecting errors in a memory includes generating a first check word based on incoming data and generating a second check word based on stored data. The method includes comparing the first check word to the second check word, generating a comparison result, and indicating a failure based on the comparison result.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully