Method and apparatus for accelerating test case development

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7231616
SERIAL NO

10645729

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Abstract

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A system configured to minimize validation time associated with an integrated circuit design is provided. The system includes a client and a server. The client is configured to identify a test case for simulation with the integrated circuit design. The client is further configured to generate a verified file from the test case. The server is in communication with the client. The server is configured to maintain an initialized state. The server, when in the initialized state, is configured to receive the verified file from the client for execution, wherein after execution of the verified file, the server is enabled to communicate results to the client and the server resets to the initialized state. A method for submitting a test case for simulation of an integrated circuit design and a computer readable medium are also provided.

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Patent Owner(s)

Patent OwnerAddress
RPX CORPORATIONFOUR EMBARCADERO SUITE 4000 SAN FRANCISCO CA 94111

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jambhekar, Vivek Mountain View, CA 2 10
Mohanty, Purna Santa Clara, CA 4 27
Thangavelu, Sivam San Jose, CA 2 10

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