System and method for DC offset compensation and bit synchronization

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United States of America Patent

PATENT NO 7231000
APP PUB NO 20030076902A1
SERIAL NO

10035567

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Abstract

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A system and method for compensating for DC offset and/or clock drift on a wireless-enabled device is described. One embodiment includes a radio module, an A/D converter connected to the radio module, a DC tracking loop connected to the A/D converter, and a multi-hypothesis bit synchronizer.

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Patent Owner(s)

Patent OwnerAddress
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LIMITED1 YISHUN AVENUE 7 SINGAPORE 768923

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yuan, Rebecca San Diego, CA 1 5

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