Flash memory structure and method for fabricating the same
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United States of America Patent
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May 29, 2007
Grant Date -
Apr 5, 2007
app pub date -
Dec 14, 2005
filing date -
Oct 5, 2005
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Abstract
A flash memory structure comprises a semiconductor substrate having a V-groove, a first doped region positioned in the semiconductor substrate, two second doped regions positioned in the semiconductor substrate and at two sides of the V-groove, a dielectric stack having trapping sites interposed therein positioned on the V-groove, and a conductive layer positioned on the surface of the dielectric stack above the V-groove. A method for forming the V-groove comprises steps of forming a mask layer on the surface of the semiconductor substrate, forming an opening in the mask layer, etching a portion of the semiconductor substrate below the opening to form the V-groove, and removing the mask layer. The semiconductor substrate can be a (100)-oriented silicon substrate, and the V-groove has inclined surface planes with (111) orientation.
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