Method of making multilayered printed circuit board with filled conductive holes
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United States of America Patent
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May 1, 2007
Grant Date -
Jun 23, 2005
app pub date -
Dec 18, 2003
filing date -
Dec 18, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.
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