Semiconductor device and fabrication method therefor

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7183190
APP PUB NO 20030155662A1
SERIAL NO

10258062

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Abstract

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A method of efficiently and inexpensively fabricating a chip-size package having an electrode pitch expanded by forming a conductor wiring on the electrode forming surface side of a semiconductor chip, especially, a method for facilitating wiring and bump forming. A semiconductor device comprising a semi-conductor elements and conductor wirings formed on the semiconductor elements by etching wiring-forming metal foil; and a fabrication method for a semiconductor device comprising the steps of laminating wiring forming metal foil on the electrode forming surface side on the semiconductor, forming a resist wiring pattern on the metal foil, etching the metal foil, and slicing the device into individual elements.

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Patent Owner(s)

Patent OwnerAddress
TOYO KOHAN CO LTDJAPAN
TADATOMO SUGA3-6-3 HIGASHINAKANO NAKANO-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ohsawa, Shingji Yamaguchi-ken, JP 1 22
Okamoto, Hiroaki Yamaguchi-ken, JP 100 910
Saijo, Kinji Yamaguchi-ken, JP 33 253
Suga, Tadatomo Yamaguchi-ken, JP 51 1579
Yoshida, Kazuo Yamaguchi-ken, JP 115 1409

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