Single IC packaging solution for multi chip modules
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United States of America Patent
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-
Feb 20, 2007
Grant Date -
N/A
app pub date -
Jan 8, 2004
filing date -
Jan 8, 2004
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A multilayer printed circuit board (PCB) interface includes a top PCB layer, a middle PCB layer, and a bottom PCB layer. A top surface of the top PCB layer receives at least one top module. The middle PCB layer includes an electrically conductive layer disposed between two dielectric layers. The electrically conductive layer forms a plurality of connectors protruding horizontally from the sides of the multilayer PCB to couple the PCB interface to a main board. A bottom surface of the bottom PCB layer receives at least one bottom module.
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