Methods and apparatus for storing memory test information

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United States of America Patent

PATENT NO 7178072
APP PUB NO 20030005353A1
SERIAL NO

10160640

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Abstract

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A method for storing memory test information includes the steps of storing a portion of information related to locations and numbers of failed memory cells detected while testing memory, and updating the stored information as failed memory cells are detected to indicate a first type of memory spare is to be assigned to repair a failed memory cell, a second complementary type of memory spare is to be assigned to repair the failed memory cell, or the memory is not repairable. The first type of memory spare corresponds to one of a row and a column portion of memory and the second complementary type of memory spare corresponds to the other of the row and column portions of memory.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS AMERICA INC1001 MURPHY RANCH ROAD MILPITAS CA 95035

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mullins, Michael A Durham, NC 8 74
Sauvageau, Anthony J Raleigh, NC 2 25

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  • 8 Citation Count
  • G11C Class
  • 2.01 % this patent is cited more than
  • 18 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges22434240144934623291112103101 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +0255075100125150175200225250275300325350375400425450475

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