SRAM array with improved cell stability
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United States of America Patent
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Feb 6, 2007
Grant Date -
Apr 14, 2005
app pub date -
Sep 27, 2004
filing date -
Nov 29, 2002
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Abstract
A CMOS static random access memory (SRAM) cell array, an integrated chip including the array and a method of accessing cells in the array with improved cell stability. Bit lines connected to half selected cells in the array are floated during cell accesses for improved cell stability.
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