Redundant back-up PLL oscillator phase-locked to primary oscillator with fail-over to back-up oscillator without a third oscillator

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United States of America Patent

PATENT NO 7173495
SERIAL NO

10907558

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Abstract

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A redundant-source clock generator has only two oscillators, rather than three oscillators. A secondary oscillator is phase-locked to a primary clock from a primary oscillator using a phase detector, charge pump, and filter that generate a control voltage to the secondary oscillator that determine the frequency of a secondary clock. The primary clock is compared to the secondary clock to detect primary clock failure. When clock failure is detected, a mux is switched to select a delayed secondary clock rather than a delayed primary clock to output as a system clock. Since the mux receives delayed clock signals, clock-failure detection has additional time to detect the clock failure before the clock failure is propagated through the mux. When the primary oscillator fails and the clock failure is detected, the phase detector stops comparing a feedback secondary clock to the primary clock and instead holds the control voltage steady.

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Patent Owner(s)

Patent OwnerAddress
DIODES INCORPORATED4949 HEDGCOXE ROAD SUITE 200 PLANO TX 75024

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, Kyusun State College, PA 5 52
Kenny, David J State College, PA 7 111

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