Apparatus and method for conditional instruction execution
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United States of America Patent
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Dec 26, 2006
Issued Date -
N/A
app pub date -
May 9, 2002
filing date -
Apr 2, 2002
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Abstract
A conditional execution apparatus in a microprocessor is provided. The conditional execution apparatus includes translation logic and extended execution logic. The translation logic translates an extended instruction into corresponding micro instructions. The extended instruction has and extended prefix and an extended prefix tag. The extended prefix specifies a condition, where execution of an operation prescribed by the extended instruction depends upon realization of the condition. The extended prefix tag indicates the extended prefix, where the extended prefix tag is an otherwise architecturally specified opcode within an instruction set for the microprocessor. The extended execution logic is coupled to the translation logic. The extended execution logic receives the corresponding micro instructions, and evaluates the condition. If the condition is not realized, then the extended execution logic precludes execution of the operation.
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