Method and apparatus for an energy efficient operation of multiple processors in a memory
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United States of America Patent
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Dec 26, 2006
Grant Date -
Oct 16, 2003
app pub date -
May 6, 2003
filing date -
Oct 18, 1990
priority date (Note) -
Expired
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Abstract
A method of operating a digital computer includes the steps of addressing a memory, reading a row of data from the memory, providing the same computational instruction simultaneously to each processor element of a plurality of processor elements, where each of the processor elements is selectively coupled to a corresponding bit position of the memory row of data, performing the same computational operation on a selected plurality of data bits in parallel, and writing the result into the memory at the same row as the data was read from.
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