Bias voltage generator circuit
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United States of America Patent
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-
Oct 31, 2006
Grant Date -
Jun 2, 2005
app pub date -
Nov 29, 2004
filing date -
Dec 1, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A bias voltage generator circuit capable of keeping a constant electric current consumption (I.sub.0) and supplying bias voltages (V.sub.1, V.sub.2) respectively kept at constant values relative to its source voltage (V.sub.DD) and GND potential even when V.sub.DD fluctuates. The circuit includes: three p-channel transistors connected in a current mirror, each having a source connected to source voltage; and four n-channel transistors, each having a source connected to GND. Bias voltages V.sub.1 and V.sub.2 are in a relation such that they control each other. Concretely, the V.sub.1 potential starting to rise causes the V.sub.2 potential to start to decrease, and the V.sub.1 potential starting to decrease causes the V.sub.2 potential to start to rise. The circuit has the property of making the circuit current fixed regardless of V.sub.DD. Even when V.sub.DD fluctuates, I.sub.0 is constant and V.sub.1 and V.sub.2 each produce a fixed potential.
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