Method to fabricate dual metal CMOS devices

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7122414
APP PUB NO 20040106249A1
SERIAL NO

10601037

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Abstract

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The present invention relates generally to barrier layers in transistor gate stacks in integrated circuits, and to processes for forming such gate stacks.

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ASM INTERNATIONAL NVJAN VAN EYCKLAAN 10 BILTHOVEN 3723 BC 3723

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Inventor Name Address # of filed Patents Total Citations
Huotari, Hannu Espoo, FI 48 7437

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