Method and apparatus for clock synthesis using universal serial bus downstream received signals
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United States of America Patent
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Oct 10, 2006
Grant Date -
Jul 29, 2004
app pub date -
Jan 28, 2003
filing date -
Jan 28, 2003
priority date (Note) -
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Abstract
In one form of the invention, a method for generating a local clock signal responsive to signals on a Universal Serial Bus ('USB') includes generating a frequency-bearing clock signal by a free running oscillator on an integrated circuitry chip of a device coupled to the USB. The oscillator runs at a frequency that is substantially stable but initially known with substantial inaccuracy. A single ended bit-serial signal is extracted from received signals sent by a USB host or hub and timing signals are responsively asserted. A bit pattern is detected in the single ended bit-serial signal and intervals are measured during which the timing signals are asserted. The period P of the local clock signal is adjusted responsive to one of the measured intervals. In one variant, the initial inaccuracy is at least partly because the oscillator consists solely of circuitry on the chip.
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