Integrating metal layers with ultra low-K dielectrics

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United States of America Patent

PATENT NO 7119008
APP PUB NO 20040266130A1
SERIAL NO

10380848

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Abstract

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In forming a layer of a semiconductor wafer, a dielectric layer is deposited on the semiconductor wafer. The dielectric layer includes material having a low dielectric constant. Recessed and non-recessed areas are formed in the dielectric layer. A metal layer is deposited on the dielectric layer to fill the recessed areas and cover the non-recessed areas. The metal layer is then electropolished to remove the metal layer covering the non-recessed areas while maintaining the metal layer in the recessed areas.

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Patent Owner(s)

Patent OwnerAddress
FMC TECHNOLOGIES S AMULBERRY FRANCE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wang, Hui Fremont, CA 1115 8921

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