Methods of forming semiconductor constructions

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7115512
APP PUB NO 20050255701A1
SERIAL NO

10848247

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Abstract

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The invention includes methods by which a fuse box of a semiconductor construction is fabricated to have a substantially uniform layer over fuses extending therein. In particular aspects, the invention includes methods in which one or more processing steps associated with fabrication and patterning of bond pads and redistribution layers is conducted simultaneously over a fuse box region to form and/or remove materials that are directly over the fuse box region.

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Patent Owner(s)

Patent OwnerAddress
U S BANK NATIONAL ASSOCIATION AS COLLATERAL AGENT100 WALL STREET SUITE 1600 NEW YORK NY 10005

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Juengling, Werner Boise, ID 254 4667
McDonald, Steven M Meridian, ID 34 721
Parekh, Kunal R Boise, ID 328 3273

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  • 2 Citation Count
  • H01L Class
  • 2.11 % this patent is cited more than
  • 19 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges651199722376222132986546322210701 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +01002003004005006007008009001000110012001300

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