Access method and architecture of non-volatile random access memory
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United States of America Patent
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Aug 15, 2006
Grant Date -
Jul 1, 2004
app pub date -
Sep 12, 2003
filing date -
Dec 30, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention provides a method as well as an architecture for a host equipped with a CPU-level processing capability to access a Non-Volatile Random Access Memory (NVRAM) and at least a controller via a simple 3-wire/4-wire mechanism. The data stored in the NVRAM are shared with the controller and the host. More importantly, a multi-access mechanism further having a pragmatic bit determines the pragmatic bit for either the controller or the NVRAM. With the method of the present invention, computer system resources can be fully utilized, and thereby, peripheral devices can be easily added to the system in an inexpensive and highly efficient way.
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