System bus controller and the method thereof
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United States of America Patent
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Jul 11, 2006
Grant Date -
Nov 11, 2004
app pub date -
Feb 20, 2004
filing date -
May 9, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A system bus controller for a computer system and a related method are introduced. The computer system has at least a bus and a bus master electrically connected to the bus. The system bus controller includes a bus slave interface, a master queue, a bus master interface, a queue entries executor and a master queue management unit. Initially, any entry command transmitted over the bus by the bus master will be sequentially queued in a memory. Then, a corresponding acknowledge signal to release access of the bus is generated by the queue management unit. Then, the queued entry commands are sequentially executed to generate corresponding results, which will be caught by the bus master in an active or passive manner.
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