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Abstract

An image sensor having an array of pixel elements constructed using a two level polysilicon CMOS process that provides individual addressability and a non-destructive readout of the pixels. The pixel elements each includes a substrate, an insulating layer formed on the substrate, a collection capacitor electrode, a transfer electrode, a readout capacitor electrode, and a readout transistor. The transfer electrode is located between the collection and readout capacitor electrodes and all three electrodes are electrically isolated from the substrate and each other by the insulating layer. The collection capacitor electrode and insulating layer are transparent so that incident light can pass through these elements and be absorbed by the substrate. A bias voltage is applied to the collection electrode to form a depletion region in the substrate where photoelectrically generated charge is collected. The charge is then transferred to a second depletion region underneath the readout capacitor electrode by applying a bias voltage to the transfer electrode. The readout transistor has an insulated gate connected to the readout capacitor electrode, so that it can generate a pixel data output signal indicative of the charge that is now stored under the readout capacitor electrode. This reading out of the pixel data is therefore non-destructive, allowing the pixel to be read multiple times without loss of information. An image sensor so constructed can be used in conjunction with on-chip image processing circuits for performing such tasks as edge detection and other algorithms that involve convolutions or other combinations of pixel data.

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