Flange for integrated circuit package
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United States of America Patent
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May 30, 2006
Grant Date -
Jan 20, 2005
app pub date -
Aug 18, 2004
filing date -
Jan 29, 2003
priority date (Note) -
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Abstract
A circuit package for housing semiconductor or other integrated circuit devices ('die') includes a high-copper flange, one or more high-copper leads and a liquid crystal polymer frame molded to the flange and the leads. The flange includes a dovetail-shaped groove or other frame retention feature that mechanically interlocks with the molded frame. During molding, a portion of the frame forms a key that freezes in or around the frame retention feature.
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