Individually biased transistor high frequency switch
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United States of America Patent
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Apr 18, 2006
Grant Date -
Nov 25, 2004
app pub date -
May 21, 2003
filing date -
May 21, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
A single-pole multiple-throw RF switch includes first and second FET arrangements, each having a gate and a controlled current path (CCP). One end of the CCP of each FET is connected to a common port by way of an arrangement which blocks DC flow between the FETs, but allows RF flow. Bias is applied to the gates of the FETs to enable RF flow through the CCP of a selected one and not through the others. One version uses a single bias source and cross-coupled resistors, and another version uses plural bias sources switched to the various FETs.
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Patent Citation Ranking
- 1 Citation Count
- H01L Class
- 2.11 % this patent is cited more than
- 19 Age
