Semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7019388
SERIAL NO

10729950

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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It is intended to improve the production yield of QFN (Quad Flat Non-leaded package) and attain a multi-pin structure. After a resin sealing member for sealing a semiconductor chip is formed by molding, a peripheral portion of the resin sealing member and a lead frame are both cut along a cutting line which is positioned inside (on a central side of the resin sealing member) of a line (molding line) extending along an outer edge of the resin sealing member, whereby the whole surface (upper and lower surfaces and both side faces) of each of leads exposed to side faces (cut faces) of the resin sealing member is covered with resin, thus preventing the occurrence of metallic burrs on the cut faces of the leads.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATIONTOKYO 135-0061

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ito, Fujio Hanno, JP 56 642
Kurakawa, Keiko Ome, JP 2 14
Murakami, Fumio Kodaira, JP 10 53
Shimoji, Hiroshi Hamura, JP 2 14
Suzuki, Hiromichi Tokyo, JP 127 1931
Takeno, Hiroyuki Koganei, JP 14 71

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