Feed-forward circuit for reducing delay through an input buffer
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United States of America Patent
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Feb 28, 2006
Grant Date -
Jul 21, 2005
app pub date -
Jan 16, 2004
filing date -
Jan 16, 2004
priority date (Note) -
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Abstract
An invention is provided for a feed forward circuit that reduces delay through an inverting circuit. The feed forward circuit includes an inverter having an input and an output, and an inverting circuit having an input and an output. The input of the inverting circuit is coupled to the output of the inverter. A feed forward transistor having a gate coupled to the input of the inverter and a terminal coupled to the output of the inverting circuit also is included. In operation the feed forward transistor decreases the amount of time required for the output of the inverting circuit to change state. In sum, the invention reduces the delay when the inverting circuit transitions to a high state, without affecting the timing of the transition to a low state.
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