Device for subtracting or adding a constant amount of charge in a charge-coupled device at high operating frequencies
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United States of America Patent
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Feb 21, 2006
Grant Date -
Dec 22, 2005
app pub date -
Jun 21, 2004
filing date -
Jun 21, 2004
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A circuit for adding or subtracting an amount of charge from a charge sample, such as in a Charge Coupled Device (CCD), by portioning and pipelining the processing stages, to avoid introducing a memory effect. The operation, such as subtraction, is split into multiple stages, with each stage responsible for removing only a portion of the total amount of charge that is desired to be removed. The subtraction pipeline stages operate together to remove the total desired charge amount. In one embodiment each successive subtraction stage removes a corresponding lesser amount of charge. As a result, greater accuracy in the amount of charge removed is achieved as well operation at higher frequencies than previous charge subtraction approaches.
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