Method of forming thin-film transistor devices with electro-static discharge protection
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United States of America Patent
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Jan 24, 2006
Grant Date -
Jul 14, 2005
app pub date -
Mar 4, 2004
filing date -
Jan 13, 2004
priority date (Note) -
Expired
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Abstract
A silicon layer is formed on a substrate, and then the silicon layer is patterned, and source regions, drain regions and connectors, all with the same conductivity, are formed. The source regions are connected with the drain regions electrically by the connectors, and short circuits are thus constructed. Then, subsequent procedures of thin film transistor fabrication are performed in turn. Finally, when the source/drain metal is patterned to form data lines, the connectors are cut off by etching as the source/drain metal is etched.
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