Method for forming heightened solder bumps on circuit boards
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United States of America Patent
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Dec 27, 2005
Grant Date -
N/A
app pub date -
Feb 9, 2005
filing date -
Feb 9, 2005
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention relates a method for forming heightened solder bumps on a circuit board, which has a surface formed with a plurality of pads and a solder resist thereon and the pads are exposed from the solder resist. The steps of the method mainly are: firstly, applying a first stencil printing and a first reflow process to the circuit board so that a plurality of first solder bumps form on the pads respectively. Then, apply a second stencil printing and a second reflow process to the circuit board so as to have solder paste formed on the first solder bumps and to have the solder paste integrated with the first solder bumps respectively to form the heightened solder bumps on the pads.
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