Method and system for determining the best integral process path to process semiconductor products to improve yield
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United States of America Patent
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Dec 13, 2005
Grant Date -
Sep 26, 2002
app pub date -
Jul 9, 2001
filing date -
Sep 14, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A computer-implemented method for identifying the best process path in a semiconductor manufacturing process for processing a plurality of wafer lots that includes providing a plurality of operations in the semiconductor manufacturing process, providing a plurality of tools in at least one of the plurality of operations, providing a plurality of yields for each of the plurality of operations, providing a plurality of process paths, calculating an average yield for the plurality of yields, setting the average yield as a response, setting the plurality of operations as control factors, setting the plurality of tools as factor levels in response to at least one of the plurality of operations, determining at least one of the plurality of operations as having the most contribution using an analysis of variance method, wherein the at least one of the plurality of operations causes the responses to change greater than a predetermined level when the plurality of tools are changed, and outputting the at least one of the plurality of operations as the most influential operation.
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