Shift register circuit including first shift register having plurality of stages connected in cascade and second shift register having more stages
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United States of America Patent
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Nov 8, 2005
Grant Date -
Nov 6, 2003
app pub date -
Oct 23, 2001
filing date -
Oct 24, 2000
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A shift register circuit includes a first shift register having a plurality of stages connected in cascade, and a second shift register having more stages than the first shift register. The stages of the second shift register are divided into groups each formed of consecutive stages. The stages of the first shift register output pulse sequences having a predetermined number of consecutive pulses and having different phases from each other, to the stages constituting the groups of the second shift register as clock signals.
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