Fine string compensation to minimize digital to analog converter differential nonlinearity error
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United States of America Patent
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Oct 25, 2005
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N/A
app pub date -
Apr 22, 2004
filing date -
Apr 22, 2004
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Abstract
Disclosed is a process for minimizing digital-to-analog converter differential nonlinearity by adjusting taps in resistive elements in a fine resistor string voltage divider circuit. Active buffer circuits can be eliminated while still minimizing DAC DNL and insuring circuit monoticity.
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