Semiconductor device and manufacturing method thereof
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United States of America Patent
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-
Oct 25, 2005
Grant Date -
Dec 2, 2004
app pub date -
May 26, 2004
filing date -
May 30, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a semiconductor device manufacturing process using a low-dielectric-constant insulation film as an interlayer insulation film, a stress exerted on wiring layers and interlayer insulation films is reduced. In a semiconductor device in which a plurality of buried wiring layers are formed in the interlayer insulation films each formed of a low-dielectric-constant insulation film lower in mechanical strength than a silicone oxide film formed by, for example, a CVD method, a first layer of wiring, on a lower layer of which a low-dielectric-constant insulation film is not disposed, serves as a bonding pad, and bump electrodes are formed on the wiring so as to become higher than a position where the uppermost buried wiring is formed.
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