Automatic adjusting method and circuit
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United States of America Patent
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Sep 27, 2005
Grant Date -
Aug 1, 2002
app pub date -
Jan 24, 2002
filing date -
Jan 30, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
When a communication speed of CPU 104 can be increased, a procedure of automatic phase adjustment involves setting phase shift amount CLK_DLY=n immediately after a vertical synchronization signal interrupt is generated, and reading video detection data VIDEO_DATA(n) after setting phase shift amount CLK_DLY=n+1 when the next vertical synchronization signal interrupt is generated. When CPU 104 is limited in the communication speed, the automatic adjustment is performed by an automatic adjusting circuit which has phase control data memory 107, video detection data memory 109, and a trigger input served by vertical synchronization signal S102.
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