Variable rate sigma delta modulator
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United States of America Patent
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Sep 13, 2005
Grant Date -
Sep 30, 2004
app pub date -
Dec 8, 2003
filing date -
Mar 28, 2003
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A sigma delta circuit is provided having a sigma delta modulator configured to operate according to a first clock signal and a quantizer connected to the sigma delta modulator, where the quantizer is configured to operate according to a second clock signal. In operation, if a small amplitude signal is received by the sigma delta circuit, the circuit is configured to operate at a fixed output frequency. When a large amplitude signal is received, the circuit is configured to adjust to a different frequency to accommodate the larger signal. The second clock signal may be a variable clock signal, where the quantizer operates according to a variable clock signal in order to adjust to different input signals.
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