Substrate for semiconductor package
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United States of America Patent
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Aug 23, 2005
Grant Date -
Aug 28, 2003
app pub date -
May 20, 2002
filing date -
Feb 26, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
The invention provides a semiconductor package substrate, which includes a substrate, a chip contact area, an inner pad portion, an outer pad portion and a conductive layer. The chip contact area, the inner pad portion, the outer pad portion and the conductive layer are formed on one side of the substrate, wherein the outer pad portion encloses the inner pad portion that surrounds the chip contact area in the center of the substrate. The inner pad portion and the outer pad portion contain a plurality of signal pads and a plurality of shielding pads respectively, while the conductive layer and each of the shielding pads are electrically connected.
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