Shared memory architecture in GPS signal processing
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United States of America Patent
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Aug 16, 2005
Grant Date -
May 8, 2003
app pub date -
Dec 4, 2002
filing date -
Dec 16, 1999
priority date (Note) -
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Abstract
A shared memory architecture for a GPS receiver, wherein a processing memory is shared among the different processing functions, such as the correlator signal processing, tracking processing, and other applications processing. The shared memory architecture within the GPS receiver provides the memory necessary for signal processing operations, such as the massively parallel processing, while conserving memory cost by re-using that same memory for other GPS and non-GPS applications. The shared memory architecture for a GPS receiver provided in accordance with the principles of this invention thereby significantly minimize the costly memory requirement often required of extremely fast signal acquisition of a GPS receiver.
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