Packet buffer memory with integrated allocation/de-allocation circuit
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United States of America Patent
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Aug 2, 2005
Grant Date -
Nov 13, 2003
app pub date -
Apr 9, 2003
filing date -
Apr 16, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A buffer memory with a memory allocation and de-allocation circuit. The buffer memory has an address space divided into address blocks and a memory address space divided into memory blocks. The circuit, in response to an allocation request for an allocation of a certain size buffer, allocates sufficient address blocks and memory blocks for the buffer. The circuit, in response to a de-allocation request to de-allocate a certain size of memory, de-allocates whole unused address blocks and memory blocks.
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