MIXED-MODE PROCESS
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United States of America Patent
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Jul 12, 2005
Grant Date -
Jul 21, 2005
app pub date -
Jan 15, 2004
filing date -
Jan 15, 2004
priority date (Note) -
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Abstract
A mixed-mode process introduces a hard mask layer. Due to the introduced hard mask layer made of non-resist material formed over devices, performance of a formed capacitor is protected from effects of an implantation process such as source/drain implantation. A self-aligned silicide (salicide) process for a MOSFET transistor can also be performed. Thus, production efficiency and performance of an IC product formed by the mixed-mode process can be improved. Moreover, the number of required fabrication steps is reduced and cost savings can be realized.
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