Solder terminal and fabricating method thereof
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United States of America Patent
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May 24, 2005
Grant Date -
Oct 21, 2004
app pub date -
May 10, 2004
filing date -
Oct 23, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
A solder terminal and a fabrication method thereof are provided. According to one embodiment of the present invention, a solder terminal structure includes an adhesion metal layer formed on an electrode pad of a semiconductor device, a thermal diffusion barrier, a solder bonding layer, and a solder bump formed on upper portion of the solder bonding layer. With the thermal diffusion layer, the characteristic deterioration caused by the probe mark generated on the electrode pad can be prevented during a semiconductor reliability test, and at the same time, material movement between the layers of the electrode pad, the solder bonding layer and the adhesion metal layer can be reduced. Also, by having the thermal diffusion barrier act as a solder dam (a layer to confine the melted solder area to prevent the solder from being wetted), an additional deposition or etching process can be omitted.
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